Types in Spinal

Types

The language provides 5 base types and 2 composite types that can be used.

• Base types : Bool, Bits, UInt for unsigned integers, SInt for signed integers, Enum.
• Composite types : Bundle, Vec.

Those types and their usage (with examples) are explained hereafter.

Bool

This is the standard boolean type that correspond to a bit.

@TODO is there a any way / sense to assign values such as U or X, does it correspond in reality to std_logic ?

Declaration

The syntax to declare such as value is as follows:

Using this type into Spinal yields:

val myBool = Bool()
myBool := False         // := is the assignment operator
myBool := Bool(false)   // Use a Scala Boolean to create a literal

Operators

The following operators are available for the Bool type

The BitVector family - (Bits, UInt, SInt)

BitVector is a family of types for storing multiple bits of information in a single value. This type has three subtypes that can be used to model different behaviours: Bits do not convey any sign information whereas the UInt (unsigned integer) and SInt (signed integer) provide the required operations to compute correct results if signed / unsigned arithmetics is used.

Declaration syntax

@TODO mettre un lien sur syntaxe EBNF

Elements could be defined as follows:

You can define a Range values

val myUInt = UInt(8 bit)
myUInt := U(2,8 bit)
myUInt := U(2)
myUInt := U"0000_0101"  // Base per default is binary => 5
myUInt := U"h1A"        // Base could be x (base 16)
                        //               h (base 16)
                        //               d (base 10)
                        //               o (base 8)
                        //               b (base 2)                       
myUInt := U"8'h1A"       
myUInt := 2             // You can use scala Int as literal value

myUInt := U(default -> true) // Assign myUInt with "11111111"
myUInt := U(myUInt.range -> true) // Assign myUInt with "11111111"
myUInt := U(7 -> true,default -> false) //Assign myUInt with "10000000"
myUInt := U((4 downto 1) -> true,default -> false) //Assign myUInt with "00011110"

Valid operators

Bits

UInt, SInt

Bool, Bits, UInt, SInt

Vec

val myVecOfSInt = Vec(SInt(8 bit),2)
myVecOfSInt(0) := 2
myVecOfSInt(1) := myVecOfSInt(0) + 3

val myVecOfMixedUInt = Vec(UInt(3 bit), UInt(5 bit), UInt(8 bit))

val x,y,z = UInt(8 bit)
val myVecOf_xyz_ref = Vec(x,y,z)
for(element <- myVecOf_xyz_ref){
  element := 0   //Assign x,y,z with the value 0
}
myVecOf_xyz_ref(1) := 3    //Assign y with the value 3

###Bundle ```scala case class RGB(channelWidth : Int) extends Bundle{ val red = UInt(channelWidth bit) val green = UInt(channelWidth bit) val blue = UInt(channelWidth bit)

def isBlack : Bool = red === 0 && green === 0 && blue === 0 def isWhite : Bool = { val max = U((channelWidth-1 downto 0) -> True) return red === max && green === max && blue === max } }

case class VGA(channelWidth : Int) extends Bundle{ val hsync = Bool val vsync = Bool val color = RGB(channelWidth) }

val vgaIn = VGA(8) //Create a RGB instance val vgaOut = VGA(8) vgaOut := vgaIn //Assign the whole bundle vgaOut.color.green := 0 //Fix the green to zero ```

Enum

TODO ```scala object UartCtrlTxState extends SpinalEnum { val sIdle, sStart, sData, sParity, sStop = newElement() }

import UartCtrlTxState._ val stateNext = UartCtrlTxState() stateNext := sIdle ```

Data (Bool, Bits, UInt, SInt, Enum, Bundle, Vec)

Register

Creating register is very different than VHDL/Verilog.

You can also set the reset value of a register by calling the init(value : Data) function ```scala val counter = Reg(UInt(4 bit)) init(0) //Register of 4 bit initialized with 0 counter := counter + 1

val counter = RegInit(U”0000”) counter := counter + 1

val registerStage = RegNext(counter) //counter delayed by one cycle ```